ARM syscall as c++ template -


i need call syscalls in newlib stubs , current implementation uses c macros got unreadable , awful looking on time. (and hate macros...) however, implementation c++ templates work 1 parameter:

template <int nr, typename rettype, typename param1>      inline rettype syscall(param1 p1) {   register param1 r0 asm("r0") = p1;   asm volatile("svc %[nr]\n"     : "=r" (r0)     : [nr] "i" (nr), "r" (r0)     : "memory", "r1", "r2", "r3", "r12", "lr");   return (rettype) r0; }

now can call e.g. malloc using 

void *ptr = syscall<sys_malloc, void*>(0x1000);

to allocate 0x1000 bytes.

my implementation 4 parameters:

template <int nr, typename rettype, typename param1, typename param2, typename param3, typename param4>      inline rettype syscall(param1 p1, param2 p2, param3 p3, param4 p4) {   register param1 r0 asm("r0") = p1;   register param2 r1 asm("r1") = p2;   register param3 r2 asm("r2") = p3;   register param4 r3 asm("r3") = p4;    asm volatile("svc %[nr]\n"     : "=r" (r0)     : [nr] "i" (nr), "r" (r0), "r" (r1), "r" (r2), "r" (r3)     : "memory", "r12", "lr");    return (rettype) r0; }

doesn't work, content of registers @ "swi" instruction arbitrary. somehow gcc doesn't respect "register" variables anymore. example: set breakpoint @ svc instruction , execute

syscall<fwrite, int>(ptr, 1, len, f)

but somehow r0 set 1 , r1 ptr... tried compiling without optimizations, order of registers changed bit, it's still wrong order. know "mov r0, %[param1]" etc. prevent optimizations , therefore result in slower code.

is bug in gcc (4.8.2) or did overlooking something?

this bug 33661, rather old. encountered myself several years ago.


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